1. Field of the Invention
The present invention relates to the field of display technology, and more particular to a solid phase crystallization method and a manufacturing method of a low-temperature poly-silicon thin-film transistor (TFT) substrate.
2. The Related Arts
Thin-film transistor (TFT) is the primary driver element for liquid crystal displays (LCDs) and active matrix organic light-emitting diode (AMOLED) display devices and is directly related to the direction of development of high performance flat panel display devices.
Low-temperature poly-silicon has attracted wide attention recently, due to high electron mobility, good sub-threshold swing, large ON/OFF state current, and low owe consumption, as well as being applicable to fabrication of high pixel density (pixels per inch, PPI) displays and also applicable to flexible organic light emitting diode (OLED) substrate. For the LCDs that are driven by voltage, the low-temperature poly-silicon TFT has a relatively high mobility so that it is possible to achieve driving liquid crystal molecules to rotate by using a TFT having a relatively small size to thereby reduce, to quite an extent, the space occupied by the TFT, increase light transmission area, and obtain higher brightness and resolution. For the AMOLED display devices that are driven by current, the low-temperature poly-silicon TFT could better suit the requirements for the driving current.
Heretofore, commonly known processes of crystallization of low-temperature poly-silicon includes excimer laser annealing (ELA) method and solid phase crystallization (SPC) method. ELA needs to be conducted with machines that are expensive so that the fabrication cost is high. In addition, grains formed with ELA crystallization have poor consistency and a TFT substrate manufactured therewith, when applied to a display device, may readily cause non-uniform display brightness (ELA scan mura), making it not possible for fabrication of large-sized displays. Compared to ELA crystallization method, SPC method has a relatively low fabrication cost. FIG. 1 illustrates a curve of annealing operation of the known SPC method. As shown in FIG. 1, the known SPC method provides continuous heating for 60 minutes, by directly placing amorphous silicon (a-Si) in a high temperature environment of around 650° C., to get crystallized. FIG. 2 is a schematic view illustrating grain morphology obtained with the known SPC method. As shown in FIG. 2, since the a-Si is directly placed in a high temperature environment, in an initial phase of crystallization, temperatures of the amorphous silicon in different areas vary greatly so a the growth speeds of crystal nuclei in different areas show great difference, leading to the size of grains grown with SPC being different and showing poor consistency, and eventually causing great difference in respect of the characteristics of TFT devices, affecting product yield.